a. Field of the Invention
The present invention pertains generally to integrated circuit design and manufacturing, and more specifically to software and database techniques that aid in analyzing an electrical circuit that is intended to be manufactured as an integrated circuit.
b. Description of the Background
The process of creating an integrated circuit begins by first designing an electrical schematic of an electrical circuit that will someday be created as an integrated circuit. Until the electrical circuit schematic is designed, the layout of the integrated circuit cannot begin. To make circuit design more efficient and less prone to error, software tools have been created to assist in creating the electrical circuit schematic drawing. The software tool, commonly called electrical schematic capture software, allows an electrical circuit designer to create an electrical circuit schematic in much the same manner as computer aided design (CAD) software tools assist a mechanical draftsperson in creating a mechanical drawing of a physical device. Some of the most common electrical schematic capture software tool vendors include: Mentor Graphics Corporation, Cadence Design Systems, and Synopsys, Inc. Many of the electrical schematic capture software tool vendors also supply electrical circuit analysis and simulation software tools, and integrated circuit layout and testing software tools. Mentor Graphics Corporation is located at 8005 SW Boeckman Road, Wilsonville, Oreg. 97070, and may be contacted at phone numbers 800-592-2210 and 503-685-7000 Cadence Design Systems is located at 2655 Seely Avenue, San Jose, Calif. 95134, and may be contacted at phone number 408-943-1234 Synopsys, Inc. is located at 700 East Middlefield Road, Mountain View, Calif. 94043, and may be contacted at phone numbers 650-584-5000 and 800-541-7737.
The electrical circuit designer typically lays out an electrical circuit schematic by placing primitive electrical devices onto an electrical schematic page. The electrical circuit designer then connects the primitive electrical devices with a line in a manner that creates the desired electrical circuit. The line represents an electrically connecting wire, or an electrical short, between the connected primitive electrical devices. A primitive electrical device is a basic electrical device that cannot be broken down into smaller devices within the electrical schematic capture software. The primitive electrical device is typically a device such as a resistor, capacitor, inductor, diode, transistor, and other similar basic electrical devices. The attributes, or properties, of each primitive electrical device are specified by the electrical circuit designer, and stored within the electrical schematic capture software. The device attributes determine the type and characteristics of each primitive electrical device within the system. For instance, a resistor might have attributes to define resistance, power ratings, and electrical connection points. Other primitive electrical devices would have similar, appropriate attributes to define the electrical characteristics for the primitive electrical device.
Many times, an electrical circuit designer may want to reuse a part of a circuit, sometimes called a sub-circuit, in other sections of the overall circuit. This is accomplished within the electrical schematic software tool by defining a sub-circuit as a macro. The macro has macro attributes similar to the primitive electrical device that define the external electrical connection points for the macro. The makeup of the internal electrical devices determine the electrical behavior of the macro. A macro can be made up of other macros defined within the electrical schematic capture software tool, as well as primitive electrical devices.
After the electrical circuit schematic is completed, the electrical circuit represented by the electrical circuit schematic is simulated to insure the electrical circuit functions as desired by the circuit designer. The simulation of the electrical circuit may be performed by the electrical schematic capture software tool, or by another analysis software tool. The choice of using the electrical schematic capture software tool simulation or an external simulation software tool depends on the complexity of the electrical circuit, and the complexity of the desired simulation. In order to allow an external software tool to analyze the electrical circuit, the electrical schematic software tool has the ability to create a netlist text file representing the electrical circuit in a text form. The netlist text file contains all of the data defining the primitive electrical devices, the electrical attributes of each primitive electrical device, the sub-circuit macros, the electrical attributes of each macro, the electrical connections for all of the primitive electrical devices and macros, and the attributes of each electrical connection including the connection point of each primitive electrical device and macro included in each electrical connection. HSPICE and Circuit Design Language (CDL) are considered two of the most common netlist text file formats, even though there are other netlist text file formats available. HSPICE is the most common netlist text file format, and is considered a defacto industry standard. HSPICE is a registered trademark of Synopsys, Inc., and information concerning the HSPICE netlist text file format may be obtained by contacting Synopsys, Inc. using the previously stated Synopsys, Inc. contact information. Circuit Design Language (CDL) netlist text file format is controlled by Cadence Design Systems, and information concerning the Circuit Design Language (CDL) netlist text file format may be obtained by contacting Cadence Design Systems using the previously stated Cadence Design Systems contact information. Another netlist text file format is SPECTRE for use with SPECTRE software produced by Cadence Design Systems. SPECTRE is a registered trademark of Cadence Design Systems, Inc., and information concerning the SPECTRE netlist text file format may be obtained by contacting Cadence Design Systems using the previously stated Cadence Design Systems contact information.
The netlist text file is imported by the external analysis software, and the electrical circuit is simulated. If errors in the electrical circuit are found, changes are made to the electrical circuit schematic in the electrical schematic software package. The netlist text file for the updated electrical circuit schematic is created and imported into the analysis software. The simulation and circuit schematic modification is repeated until the electrical circuit functions as desired on the simulator. Many of the analysis software tools allow the user to make modifications to the circuit being simulated so that the analysis process is not too cumbersome.
Once the electrical circuit functions properly within the simulator, the electrical circuit must then be created as an integrated circuit. The same netlist text file used to send electrical circuit data to external analysis and simulation software tools is used to export electrical circuit data to an integrated circuit layout software tool. The integrated circuit layout software tool imports the electrical circuit data in the netlist text file, and uses the electrical circuit data to layout the physical features of the integrated circuit that create the desired electrical circuit. After the integrated circuit layout is performed additional analysis and simulation of the integrated circuit is performed. The analysis and simulation of the integrated circuit allows the circuit designer to perform topological checks of the integrated circuit to find parasitics within the integrated circuit layout. A topological check may be configured to look for layout guidelines, known as Design Rule Checks (DRC's). For example, a topological check may look for a circuit element that has two MOSFET transistors connected together from the drain of one transistor to the gate of the other transistor, and where the source of each transistor is connected to a different ground plain. Since the ground plains may be at different electrical potentials there is a parasitic effect between the two transistors that may cause problems in the function of the circuit that would not be present in a simulation of the electrical circuit that does not include the physical integrated circuit layout. If problems are found during the analysis and simulation of the integrated circuit layout, the circuit changes are made using the electrical schematic capture software tool and the integrated circuit layout is performed again.
After a satisfactory analysis and simulation is performed on the integrated circuit layout, the integrated circuit is created and electrically tested for proper operation. If a problem is encountered, the electrical circuit schematic must be updated within the electrical schematic software tool, and the testing, simulation, layout, and manufacturing of the integrated circuit must be performed again to insure a properly functioning integrated circuit.
The present application is filed simultaneously with application Ser. No. 10/956,860, entitled “Netlist Query Language” by the present inventor, Eric Miller, filed Sep. 30, 2004, the full text of which is hereby specifically incorporated by reference for all it discloses and teaches.